1. Field of the Invention
The present invention generally relates to high availability computer networks. More particularly, the invention relates to a synchronization technique used to synchronize a standby software image to an active image to permit rapid fail-over to the standby image in the event of a failure associated with the active image.
2. Background Information
Initially, computers were most typically used in a standalone manner. It is now commonplace for computers and other types of computer-related and electronic devices to communicate with each other over a network. The ability for computers to communicate with one another has lead to the creation of networks ranging from small networks comprising two or three computers to vast networks comprising hundreds or even thousands of computers. Networks can be set up to provide a wide assortment of capabilities. For example, networks of computers may permit each computer to share a centralized mass storage device or printer. Further, networks enable electronic mail and numerous other types of services. Generally, a network's infrastructure comprises switches, routers, hubs and the like to coordinate the effective and efficient transfer of data and commands from one point on the network to another.
Networks often comprise a “fabric” of interconnected switches which are devices that route data packets from source ports to destination ports. The switches in a network typically are relatively complex devices that include microprocessors, memory, and related components and execute firmware stored in non-volatile memory such as read only memory (“ROM”). The switches typically have multiple ports which may be physically connected to other switches or other devices such as servers, storage devices, user consoles, and other types of I/O devices.
Switches may be fabricated in “blade” form comprising a circuit board mated to a tray. The blade assembly then can be slid into a chassis so that blind mating connectors on the blade engage corresponding sockets in the chassis. In one type of switch chassis embodiment, the chassis is able to accommodate multiple, generally identical, blades (e.g., eight). The number of blades used in the system can be scaled up or down as needed. One or more control processors (“CPs”) may also be included in the chassis in blade form. Each CP preferably includes one or more microprocessors, memory (both volatile and non-volatile), and connects to the various switches in the chassis, firmware stored in non-volatile memory which is executed by the CP's microprocessor, etc.
In those systems in which two CPs are provided in a single chassis, typically, one CP is deemed the “active” CP and the other CP is in a “standby” mode of operation. The active CP is fully operational and interactive with the various switches in the chassis, and switches and CPs in other chassis. The standby CP is generally identical to the active CP (i.e., same hardware and same software loaded thereon), but is non-operational. If the active CP fails or otherwise ceases to be fully operational for whatever reason, control may pass from the failed active CP to the standby CP. This fail-over process involves the coordination of a great deal of software state and hardware configuration information and, accordingly, consumes a significant amount of time. As such, it would be highly desirable to reduce the time required as much as possible to fail over from the active CP to the standby CP. It is also desirable to minimize the disruption of service that may occur during the fail-over process.